@Cefiar
I've just checked the datasheet for the default pin state. I/O pins are set to input by default, with pull-up resistors *enabled*. That explains why FET5/6 are being driven. The datasheet also specifies the pull-up resistance to be somewhere between 50k and 150k. So, if a 10k pull-down resistor was added, that would ensure that in the worst case, the voltage will be 3.3*(10/(10+50))=0.55V which I believe is low enough to turn off the FETs.
I've just checked the datasheet for the default pin state. I/O pins are set to input by default, with pull-up resistors *enabled*. That explains why FET5/6 are being driven. The datasheet also specifies the pull-up resistance to be somewhere between 50k and 150k. So, if a 10k pull-down resistor was added, that would ensure that in the worst case, the voltage will be 3.3*(10/(10+50))=0.55V which I believe is low enough to turn off the FETs.