The S/H cap will get charged from the 10uF so the impedance of the input network has no effect on its charging time.
Is Bobc's circuit really the opposite way to mine? I read it the other way and drew mine I what I thought was the same direction, hence why it is backwards.
If we assume input leakage is less than 10uA, which CMOS MCU pins usually are. Then to make less than 1 LSB error on a 10 bit number the series resistor should drop less than 3.3V/1024 at 10uA, so I think the resistor can be up to about 320R. So 300R 1/4W could be used negate the need for the PTC and will handle being shorted to 12V.
Is Bobc's circuit really the opposite way to mine? I read it the other way and drew mine I what I thought was the same direction, hence why it is backwards.
If we assume input leakage is less than 10uA, which CMOS MCU pins usually are. Then to make less than 1 LSB error on a 10 bit number the series resistor should drop less than 3.3V/1024 at 10uA, so I think the resistor can be up to about 320R. So 300R 1/4W could be used negate the need for the PTC and will handle being shorted to 12V.